VLSI Chip Design with the Hardware Description Language Verilog (Record no. 15296)
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000 -LEADER | |
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fixed length control field | 00532pam a2200169a 44500 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
fixed length control field | 140414b1996 xxu||||| |||| 00| 0 eng d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
International Standard Book Number | 9783540600329 |
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
Classification number | 621.395 |
Item number | GOL |
100 ## - MAIN ENTRY--PERSONAL NAME | |
Personal name | GOLZE, U |
245 ## - TITLE STATEMENT | |
Title | VLSI Chip Design with the Hardware Description Language Verilog |
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
Place of publication, distribution, etc | New Delhi |
Name of publisher, distributor, etc | Springer |
Date of publication, distribution, etc | c1996. |
300 ## - PHYSICAL DESCRIPTION | |
Extent | xiv,358 |
600 ## - SUBJECT ADDED ENTRY--PERSONAL NAME | |
Personal name | Computer engineering |
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical term or geographic name as entry element | VLSI CHIP DESIGN--HARDWARE DESCRIPTION--LANGUAGE VERILOG |
690 ## - LOCAL SUBJECT ADDED ENTRY--TOPICAL TERM (OCLC, RLIN) | |
Topical term or geographic name as entry element | ELECTRONICS AND COMMUNICATION ENGINEERING |
942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
Source of classification or shelving scheme | Dewey Decimal Classification |
Item type | General Books |
Withdrawn status | Lost status | Damaged status | Koha normalized classification for sorting | Not for loan | Home library | Current library | Shelving location | Date acquired | Total Checkouts | Full call number | Barcode | Date last seen | Date last borrowed | Koha item type |
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621_395000000000000_GOL | Malaviya National Institute of Technology | Malaviya National Institute of Technology | General Stacks | 07/11/2012 | 2 | 621.395 GOL | 52205 | 15/03/2021 | 25/10/2019 | General Books |