Modeling of Interconnect In VLSI (Record no. 51284)

MARC details
000 -LEADER
fixed length control field 00551pam a2200169a 44500
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 140414b2002 xxu||||| |||| 00| 0 eng d
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Pareek, Pankaj
245 ## - TITLE STATEMENT
Title Modeling of Interconnect In VLSI
Statement of responsibility, etc. edited by Mr. Boolchandani Dharmendar
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Place of publication, distribution, etc. JAIPUR
Name of publisher, distributor, etc. DEPARTMENT OF ECE, MNIT
Date of publication, distribution, etc. 2002
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element PROJECT REPORT
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element PANKAJ PAREEK
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element VLSI
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element ELECTRONICS AND COMMUNICATION ENGINEERING
690 ## - LOCAL SUBJECT ADDED ENTRY--TOPICAL TERM (OCLC, RLIN)
Topical term or geographic name as entry element ELECTRONICS AND COMMUNICATION ENGINEERING
700 ## - ADDED ENTRY--PERSONAL NAME
Personal name Mr. Boolchandani Dharmendar
906 ## - LOCAL DATA ELEMENT F, LDF (RLIN)
a 56761
Holdings
Withdrawn status Lost status Damaged status Not for loan Home library Current library Date acquired Total Checkouts Full call number Barcode Date last seen Price effective from Koha item type
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