FPGA realization of discrete hadamard transform for 1 - dimensional and 2 - dimensional data points on xilinx using VHDL (Record no. 64137)
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000 -LEADER | |
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fixed length control field | 00615nam a22001697a 4500 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
fixed length control field | 160915b2015 xxu||||| |||| 00| 0 eng d |
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
Classification number | 621.38 |
Item number | AGr |
100 ## - MAIN ENTRY--PERSONAL NAME | |
Personal name | Agrawal ,Ankit (2013pev5156) |
245 ## - TITLE STATEMENT | |
Title | FPGA realization of discrete hadamard transform for 1 - dimensional and 2 - dimensional data points on xilinx using VHDL |
Remainder of title | :a dissertation report |
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
Place of publication, distribution, etc | Jaipur : |
Name of publisher, distributor, etc | Deptt. of Electronics and Communication Engineering . MNIT, |
Date of publication, distribution, etc | 2015 |
300 ## - PHYSICAL DESCRIPTION | |
Extent | 45p. |
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical term or geographic name as entry element | Electronics and Communication Engineering |
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical term or geographic name as entry element | FPGA |
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical term or geographic name as entry element | VHDL |
700 ## - ADDED ENTRY--PERSONAL NAME | |
Personal name | Bhirathi, Rakesh |
Relator term | Supvr |
942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
Koha item type | Dissertations |
Withdrawn status | Lost status | Source of classification or shelving scheme | Damaged status | Not for loan | Home library | Current library | Shelving location | Date acquired | Total Checkouts | Full call number | Barcode | Date last seen | Koha item type |
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Dewey Decimal Classification | Malaviya National Institute of Technology | Malaviya National Institute of Technology | Reference | 15/09/2016 | 621.38 AGR | PEV143 | 15/09/2016 | Dissertations |