Positive Feedback Source Coupled Logic (PFSCL) Circuit Design Using FGMOS (Record no. 78812)

MARC details
000 -LEADER
fixed length control field 00648nam a22001697a 4500
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 230803b |||||||| |||| 00| 0 eng d
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.38
Item number DAY
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Dayma, Himanshu (2020PEV5547)
245 ## - TITLE STATEMENT
Title Positive Feedback Source Coupled Logic (PFSCL) Circuit Design Using FGMOS
Remainder of title a dissertation report
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Place of publication, distribution, etc Jaipur
Name of publisher, distributor, etc Department of Electronics & Communication, MNIT
Date of publication, distribution, etc 2022
300 ## - PHYSICAL DESCRIPTION
Extent x, 50p.
Accompanying material 01 CD available
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Positive Feedback Source Coupled Logic (PFSCL) Circuit Design Using FGMOS
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element MCML Basic Operation
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element FGMOS Device Structure
700 ## - ADDED ENTRY--PERSONAL NAME
Personal name Choudhary, Bharat
Relator term Supvr.
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type Dissertations

No items available.