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System-Level Modeling At Transaction-Level, Case Study Of Multi-Processor System-On-Chip : a dissertation report.

By: SHARMA, ASHISH (2009pev107)Contributor(s): BHARGAVA,LAVA [Supvr.]Material type: Text

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TextPublication details: JAIPUR DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING, MNIT 2011 Description: vpSubject(s): SYSTEM-LEVEL MODELING AT TRANSACTION-LEVEL, CASE STUDY OF MULTI-PROCESSOR SYSTEM-ON-CHIP,SHARMA | Vlsi Design | Electronics & Communication EngineeringDDC classification: 621.395

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Item type	Current library	Call number	Status	Date due	Barcode
Dissertations	Malaviya National Institute of Technology Reference	621.395 SHA (Browse shelf(Opens below))	Available		PEV101

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