Normal view MARC view ISBD view

DESIGN AND IMPLEMENTATION OF HIGH-SPEED PIPELINED 8B/10B ENCODER USING FPGA : A Dissertation Report

By: KUMAR, ASHISH (2011PEV5034).
Contributor(s): AGARWAL,SANJEEV [Supvr].
Material type: materialTypeLabelBookPublisher: JAIPUR DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGG., MALAVIYA NATIONAL INSTITUTE OF TECHNOLOGY 2013Description: vp.Subject(s): ELECTRONICS AND COMMUNICATION | IMPLEMENTATION OF HIGH-SPEED PIPELINED 8B/10B ENCODER USING FPGA
    average rating: 0.0 (0 votes)
Item type Current location Call number Status Date due Barcode
Dissertations Dissertations Malaviya National Institute of Technology
(Browse shelf) Available PEV133

There are no comments for this item.

Log in to your account to post a comment.