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FPGA Realization of S - Box in AES and Random Multitopology Logic against Differential Power Analysis : a dissertation report

By: Sonia (2013pev5296)Contributor(s): Sahula, Vineet [Supvr.]Material type: TextTextPublication details: Jaipur : Deptt. of Electronics and Communication Engineering . MNIT, 2015. Description: 42pSubject(s): Electronics and Communication Engineering | FPGA | S - Box - AESDDC classification: 621.38
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