TY  - BOOK
AU  - SHARMA, ASHISH (2009pev107)
AU  - BHARGAVA,LAVA
TI  - System-Level Modeling At Transaction-Level, Case Study Of Multi-Processor System-On-Chip
U1  - 621.395 
PY  - 2011///
CY  - JAIPUR
PB  - DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING, MNIT
KW  - SYSTEM-LEVEL MODELING AT TRANSACTION-LEVEL, CASE STUDY OF MULTI-PROCESSOR SYSTEM-ON-CHIP,SHARMA
KW  - Vlsi Design
KW  - Electronics & Communication Engineering
ER  -