Results
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Design Of 3 Dimensional Network on chip :a disstertation report. by RANJAN, RAHUL (2008pcp106) | GAUR, M S [Supvr.]. Material type:  Text; Format:
print
; Literary form:
Not fiction
Publication details: Jaipur COMPUTER ENGINEERING, MNIT 2010Availability: Items available for loan: Malaviya National Institute of Technology (1)Call number: 621.392 RAN.
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QoS aware routing in network-on-chip : a thesis report by Paliwal, Krishan Kumar (2007RCP001) | Gaur, M.S [Supvr.] | Vijay, Janyani [Supvr.]. Material type: Text; Format:
print
; Literary form:
Not fiction
Publication details: Jaipur Department of Computer Engineering, MNIT 2010Availability: Items available for reference: Malaviya National Institute of Technology: Not for loan (1)Call number: 004.
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Reliability-aware analysis and design of network-on-Chip : a thesis report by Sharma,Ashish(2013RCP9515) | Gaur, Manoj Singh [Supvr.] | Bhargava,Lava [Supvr.]. Material type: Text; Format:
print
; Literary form:
Not fiction
Publication details: Jaipur Department of Computer Engineering, MNIT 2019Availability: Items available for reference: Malaviya National Institute of Technology: Not for loan (1)Call number: 004.
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