| 000 | 00653pam a2200181a 44500 | ||
|---|---|---|---|
| 008 | 140414b2009 xxu||||| |||| 00| 0 eng d | ||
| 100 | _aAGRAWAL, RENU | ||
| 245 |
_aTEST SCHEME FOR FLASH MEMORY ARRAY USING FUNCTIONAL MODEL OF DUAL-GATE MOSFET _cedited by SAHULA, VINEET ; KUMAWAT, RENU |
||
| 260 |
_aJAIPUR _bDEPARTMENT OF ECE, MNIT _c2009 |
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| 650 | _a PROJECT REPORT | ||
| 650 | _a RENU AGRAWAL | ||
| 650 | _a TEST SCHEME FOR FLASH MEMORY ARRAY | ||
| 650 | _a VLSI | ||
| 650 | _aELECTRONICS AND COMMUNICATION ENGINEERING | ||
| 690 | _aELECTRONICS AND COMMUNICATION ENGINEERING | ||
| 700 | _aSAHULA, VINEET ; KUMAWAT, RENU | ||
| 906 | _a64399 | ||
| 999 |
_c58594 _d58594 |
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