| 000 | 00825cam a2200205 i 4500 | ||
|---|---|---|---|
| 008 | 130507s2014 maua b 000 0 eng | ||
| 020 | _a9780262019668 (hardcover : alk. paper) | ||
| 082 | 0 | 0 |
_a621.392 _bPED |
| 100 | 1 | _aPedroni, Volnei A. | |
| 245 | 1 | 0 |
_aFinite state machines in hardware : _btheory and design (with VHDL and SystemVerilog) / _cVolnei A. Pedroni. |
| 260 |
_aCambridge _bThe MIT Press _cc 2013 |
||
| 300 |
_ax, 337 pages : _billustrations ; _c24 cm |
||
| 504 | _aIncludes bibliographical references (pages [331]). | ||
| 600 | _aComputer engineering | ||
| 650 | 0 | _aSystemVerilog (Computer hardware description language) | |
| 650 | 0 | _aVHDL (Computer hardware description language) | |
| 650 | 0 |
_aSequential machine theory _xData processing. |
|
| 650 | 0 |
_aComputer systems _xMathematical models. |
|
| 942 | _cBK | ||
| 999 |
_c62046 _d62046 |
||