System-on-chip test architectures :

System-on-chip test architectures : nanometer design for testability / edited by Laung-Terng Wang, Charles E. Stroud, Nur A. Touba. - Amsterdam ; Boston : Morgan Kaufmann Publishers, c2008. - xxxvi, 856 p. : ill. ; 25 cm. - The Morgan Kaufmann series in systems on silicon .

Includes bibliographical references and index.

9780123739735 (hardcover : alk. paper)


Systems on a chip--Testing.
Integrated circuits--Very large scale integration--Testing.
Integrated circuits--Very large scale integration--Design.

621.395