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System-on-chip test architectures : nanometer design for testability / edited by Laung-Terng Wang, Charles E. Stroud, Nur A. Touba.

Contributor(s): Wang, Laung-Terng | Stroud, Charles E | Touba, Nur AMaterial type: TextTextSeries: The Morgan Kaufmann series in systems on siliconPublication details: Amsterdam ; Boston : Morgan Kaufmann Publishers, c2008. Description: xxxvi, 856 p. : ill. ; 25 cmISBN: 9780123739735 (hardcover : alk. paper)Subject(s): Systems on a chip -- Testing | Integrated circuits -- Very large scale integration -- Testing | Integrated circuits -- Very large scale integration -- DesignDDC classification: 621.395
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Item type Current library Call number Status Date due Barcode
REFERENCE Malaviya National Institute of Technology
Reference 		621.395 (Browse shelf(Opens below)) Not for loan 73568

Includes bibliographical references and index.

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