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A spice modelling of high-performance ternary half adder design using gnrfet technology a dissertation report

Kalyan, Mangu Krishna (2020PEB5288)

A spice modelling of high-performance ternary half adder design using gnrfet technology a dissertation report - Jaipur Department of Electronics & Communication, MNIT 2022 - 89p. 01 CD Available

Subjects--Topical Terms:
A spice modelling of high-performance ternary half adder design using gnrfet technology
introduction to MVL
Interpreting Ternary logic levels

Dewey Class. No.: 621.38 / KAL

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A spice modelling of high-performance ternary half adder design using gnrfet technology a dissertation report

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