Wafer-Level Testing and During Burn-in for Integrated Circuits
Material type:
TextPublication details: London Artech House 2010 Description: xv,198pISBN: 9781596939899Subject(s): INTEGRATED CIRCUITS--WAFER-SCALE INTEGRATION | ELECTRONICS AND COMMUNICATION ENGINEERINGDDC classification: R 621.381
| Item type | Current library | Call number | Status | Date due | Barcode |
|---|---|---|---|---|---|
| REFERENCE | Malaviya National Institute of Technology | R621.3815 BAH (Browse shelf(Opens below)) | Not for loan | 79139 |
There are no comments on this title.