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ARCHITECTURAL LEVEL SUBTHRESHOLD LEAKPAGE POWER ESTIMATION OF SRAM ARRAYS WITH ITS PERIPHERALS : A Dissertation Report

By: NAVLAKHA, NUPUR (2011PEV5148)Contributor(s): BOOLCHANDANI,DHARMENDRA [Supvr]Material type: TextTextPublication details: JAIPUR DEPARTMENT OF ELECTRONIC AND COMMUNICATION ENGINEERING, MALVIYA NATIONAL INSTITUTE OF TECHNOLOGY,JAIPUR 2013 Description: VpSubject(s): ELECTRONICS AND COMMUNICATION ENGINEERING | VLSI | LEAKPAGE POWER ESTIMATION OF SRAM ARRAYS WITH ITS PERIPHERALS
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Item type Current library Call number Status Date due Barcode
Dissertations Dissertations Malaviya National Institute of Technology
(Browse shelf(Opens below)) Available PEV120

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