Layout Designing and Analysis of a Programmable Asynchronous Level Converter in Low Power Dual VDD System : A Dissertation Report
Material type:
TextPublication details: JAIPUR DEPARTMENT OF ECE, MNIT 2005 Description: vpSubject(s): ASYNCHRONOUS LEVEL CONVERTER : PUNEET CHAWLA | Electrical & Communication Engineering
| Item type | Current library | Call number | Status | Date due | Barcode |
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Dissertations
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Malaviya National Institute of Technology | (Browse shelf(Opens below)) | Available | PEV035 |
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